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Difference between revisions of "Talk:Open DMX USB"

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(New page: According to the Enttec page this unit doesn't support receiving DMX and there are no OS X drivers available from Enttec.)
 
(Electrical design: new section)
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According to the Enttec page this unit doesn't support receiving DMX and there are no OS X drivers available from Enttec.
 
According to the Enttec page this unit doesn't support receiving DMX and there are no OS X drivers available from Enttec.
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== Electrical design ==
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As pin 4 and 5 in the XLR5 plug is not connected to the RXD input pin of the chip, it cannot be used for the RDM protocol. But if DMX signals are fed into pin 1 and 2 (with the help of a plug gender changer), the software should be able to set the RTS line low and poll the chip for incoming serial data.
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I wonder if some DMX-serial drivers for this interface requires this exact FTDI 232BM chip (e.g. the one in Freestyler, that I could not get to work with other USB-to-serial converters.
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In general this system only requires that the app can set the serial clock speed to 250 000 baud, and be able to control the RTS line with relatively good timing. The data are transferred and buffered in the chip one byte at a time, I assume (so here the timing is not as critical, if the bytes are delivered within time)

Revision as of 13:06, 4 May 2009

According to the Enttec page this unit doesn't support receiving DMX and there are no OS X drivers available from Enttec.

Electrical design

As pin 4 and 5 in the XLR5 plug is not connected to the RXD input pin of the chip, it cannot be used for the RDM protocol. But if DMX signals are fed into pin 1 and 2 (with the help of a plug gender changer), the software should be able to set the RTS line low and poll the chip for incoming serial data.

I wonder if some DMX-serial drivers for this interface requires this exact FTDI 232BM chip (e.g. the one in Freestyler, that I could not get to work with other USB-to-serial converters.

In general this system only requires that the app can set the serial clock speed to 250 000 baud, and be able to control the RTS line with relatively good timing. The data are transferred and buffered in the chip one byte at a time, I assume (so here the timing is not as critical, if the bytes are delivered within time)